diff --git a/board/freescale/t208xrdb/README b/board/freescale/t208xrdb/README
index 24484cd..42b2b92 100644
--- a/board/freescale/t208xrdb/README
+++ b/board/freescale/t208xrdb/README
@@ -107,16 +107,16 @@
 128M NOR Flash memory Map
 -------------------------
 Start Address   End Address	Definition			Max size
-0xEFF40000	0xEFFFFFFF	u-boot (current bank)		768KB
-0xEFF20000	0xEFF3FFFF	u-boot env (current bank)	128KB
+0xEFF40000	0xEFFFFFFF	U-Boot (current bank)		768KB
+0xEFF20000	0xEFF3FFFF	U-Boot env (current bank)	128KB
 0xEFF00000	0xEFF1FFFF	FMAN Ucode (current bank)	128KB
 0xEFE00000	0xEFE3FFFF	PHY CS4315 firmware		256KB
 0xED300000	0xEFEFFFFF	rootfs (alt bank)		44MB
 0xEC800000	0xEC8FFFFF	Hardware device tree (alt bank)	1MB
 0xEC020000	0xEC7FFFFF	Linux.uImage (alt bank)		7MB + 875KB
 0xEC000000	0xEC01FFFF	RCW (alt bank)			128KB
-0xEBF40000	0xEBFFFFFF	u-boot (alt bank)		768KB
-0xEBF20000	0xEBF3FFFF	u-boot env (alt bank)		128KB
+0xEBF40000	0xEBFFFFFF	U-Boot (alt bank)		768KB
+0xEBF20000	0xEBF3FFFF	U-Boot env (alt bank)		128KB
 0xEBF00000	0xEBF1FFFF	FMAN ucode (alt bank)		128KB
 0xEBE00000	0xEBE3FFFF	PHY CS4315 firmware (alt bank)	256KB
 0xE9300000	0xEBEFFFFF	rootfs (current bank)		44MB
@@ -155,11 +155,11 @@
 
    Switching between default bank and alternate bank on NOR flash
    To change boot source to vbank4:
-	via software:   run command 'cpld reset altbank' in u-boot.
+	via software:   run command 'cpld reset altbank' in U-Boot.
 	via DIP-switch: set SW3[5:7] = '100'
 
    To change boot source to vbank0:
-	via software:   run command 'cpld reset' in u-boot.
+	via software:   run command 'cpld reset' in U-Boot.
 	via DIP-Switch: set SW3[5:7] = '000'
 
 2. NAND Boot:
@@ -197,8 +197,8 @@
 -------------------------------
 PBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM.
 SPL further initializes DDR using SPD and environment variables
-and copy u-boot(768 KB) from NAND/SPI/SD device to DDR.
-Finally SPL transers control to u-boot for futher booting.
+and copy U-Boot(768 KB) from NAND/SPI/SD device to DDR.
+Finally SPL transers control to U-Boot for futher booting.
 
 SPL has following features:
  - Executes within 256K
@@ -218,14 +218,14 @@
 -------------------------------------------------
 |STACK		   | 0xFFFD8000 (22KB)		|
 -------------------------------------------------
-|U-boot SPL	   | 0xFFFD8000 (160KB)		|
+|U-Boot SPL	   | 0xFFFD8000 (160KB)		|
 -------------------------------------------------
 
 NAND Flash memory Map on T2080RDB
 --------------------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB  (2 blocks)
-0x100000	0x17FFFF	u-boot env	512KB (1 block)
+0x000000	0x0FFFFF	U-Boot img	1MB  (2 blocks)
+0x100000	0x17FFFF	U-Boot env	512KB (1 block)
 0x180000	0x1FFFFF	FMAN ucode	512KB (1 block)
 0x200000	0x27FFFF	CS4315 ucode	512KB (1 block)
 
@@ -233,8 +233,8 @@
 Micro SD Card memory Map on T2080RDB
 ----------------------------------------------------
 Block		#blocks		Definition	Size
-0x008		2048		u-boot img	1MB
-0x800		0016		u-boot env	8KB
+0x008		2048		U-Boot img	1MB
+0x800		0016		U-Boot env	8KB
 0x820		0128		FMAN ucode	64KB
 0x8a0		0512		CS4315 ucode	256KB
 
@@ -242,8 +242,8 @@
 SPI Flash memory Map on T2080RDB
 ----------------------------------------------------
 Start		End		Definition	Size
-0x000000	0x0FFFFF	u-boot img	1MB
-0x100000	0x101FFF	u-boot env	8KB
+0x000000	0x0FFFFF	U-Boot img	1MB
+0x100000	0x101FFF	U-Boot env	8KB
 0x110000	0x11FFFF	FMAN ucode	64KB
 0x120000        0x15FFFF        CS4315 ucode	256KB